Resin-sealed semiconductor device, and die bonding material and sealing material for use therein

ABSTRACT

A resin-sealed semiconductor device which comprises a lead frame having a die bond pad and an inner lead, a semiconductor chip installed on the die bond pad via a die bonding material and a sealing material for sealing the semiconductor chip and the lead frame, wherein properties of the die bonding material and the sealing material after curing satisfies the following formulae: σe≦0.2×σb formula (1) Ui≧2.0×10 −6 ×σei formula (2) Ud≧4.69×10 −6 ×ed formula (3) wherein σb (MPa)represents the flexural strength at break of the sealing material at 25°, Ui (N·m) and Ud (N·m) represent shear strain energies of the sealing material at a soldering temperature for the inner lead and the die bonding pad, respectively, at a peak temperature during soldering, where σe=(1/log(kd 1 ))×Ee 1 ×(αm−αe 1 )×ΔT 1  formula (4), σei=Ee 2 ×(αe 2 −αm)×ΔT 2  formula (5), σed=log(kd 2 )×Ee 2 ×(αe 2 −αm)×ΔT 2  Formula (6), kd 1 : a ratio of the flexural elastic modulus Ed 1  (MPa) of the die bonding material at 25° to 1 MPa of elastic modulus (Ed 1 &gt;1 MPa), kd 2 : a ratio of the flexural elastic modulus Ed 2  (MPa) of the die bonding material at the peak temperature during the soldering to 1 MPa of elastic modulus (Ed 2 &gt;1 MPa), Ee 1 : a flexural modulus (MPa) of the sealing material at 25°, Ee 2 : a flexural modulus (MPa) of the sealing material at the peak temperature during soldering, αe 1 : an average thermal expansion coefficient (1/° C.) of the sealing material from forming temperature for the semiconductor to room temperature (25° C.), αe 2 : an average thermal expansion coefficient (1/° C.) of the sealing material from the forming temperature for the semiconductor to a peak temperature during soldering, αm: a thermal expansion coefficient (1/° C.) of the lead frame, ΔT 1 : the difference (° C.) between the forming temperature for the semiconductor and the low temperature side temperature in the temperature cycle, and ΔT 2 : the difference (° C.) between the forming temperature for the semiconductor and the peak temperature during soldering.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority fromprior Japanese Patent Application P2000-297834, P2000-297835,P2000-311047, P2000-311048, P2000-311049, P2000-311051, filed on Sep.29, 2000; the entire contents of which are incorporated by referenceherein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a resin-sealed semiconductor deviceexcellent in heat cycle resistance and mountability in which warpagedeformation of a semiconductor chip is suppressed, and, particularly,relates to a resin-sealed semiconductor device using a copper lead frameand a die bonding material and an encapsulating material used therein.

2. Description of the Related Art

A semiconductor chip such as a LSI circuit is electrically joined with alead frame and sealed by a encapsulating material for the purpose ofprotection from an external environment, thus taking the form of apackage. Representative examples of the package include a dual inlinepackage (DIP). The DIP is a pin-insertion type, which attaches asemiconductor device by inserting pins into a mounting substrate.Recently, due to requirements for miniaturization and higherfunctionality of an electronic itself in addition to high integrationand higher speed of the LSI circuit, higher density mounting has beenincreasingly carried out. Therefore, in addition to the pin-insertiontype package such as the DIP, a surface-mount package has come to bemainly used in high pin count application.

Representative examples of the surface-mount type package include a quadflat package (QFP). The QFP is designed to be directly fixed to asurface of the mounting substrate with solder or the like. The QFP hasan advantage in that the package can be mounted on both sides of themounting substrate, additionally, the package can be made thin to reducean occupied space.

As shown in FIG. 1A, in the QFP, on a die bond pad 15 located atsubstantially center of the lead frame, a semiconductor chip 11 ismounted with a die bonding material 12 interposed therebetween. The chip11 and a lead 16 are electrically connected with gold wires 14. Theentire resultant structure is sealed with an encapsulating material 13to be formed into a package (resin-sealed semiconductor device) 10. Thepackage is then solder-mounted on a printed circuit board (not shown) tobe used.

Problems in the process of manufacturing such a package, and in thesubsequent mounting and usage phases are: a warpage of a chip aftercuring of the die bonding material, which is caused when the chip 11 isfixed to the pad 15, as shown in FIG. 1B, and a crack 17 and separation18 a and 18 b within the package caused by high temperature reflow or abeat cycle in the mounting and usage phases, as shown in FIG. 1C.

The warpage of the chip in the package manufacturing process is causedby thermal stress due to a difference in physical property between thesemiconductor chip 11 and the lead frame (die bond pad) 15.Particularly, in the case of using a lead frame of copper (Cu), thedifference in coefficient of thermal expansion between the lead frameand the semiconductor chip is large, and warpage may be easily caused inthe semiconductor chip 11. In the worst case, the semiconductor chipitself is broken. When the semiconductor chip 11 bonded to the leadframe is conveyed with warpage remaining through a rack, a jam is causedin conveying, and further a wiring error is caused in the subsequentstep.

In the following mounting and usage phases, the package 10 is exposed tohigh temperature in reflowing when the package 10 is solder-mounted on amotherboard. In infrared reflow equipment or the like generally used forsolder mounting, the semiconductor device is heated to up to 215-245° C.at highest. In the solder mounting, tin-lead eutectic solder was widelyused. However, recently, since lead adversely affects the environment,lead-free solder, not using lead, has been increasingly developed. Thelead-free solder generally has a higher melting point than that of thetin-lead eutectic solder. Accordingly, the semiconductor chip is heatedup to 245-280° C. in solder mounting. In this reflow step, the adhesiveforce of the encapsulating material 13 to an inner lead 16 a or the diebond pad 15 is lowered because of the thermal stress due to the heatingand moisture absorption of the encapsulating material 13. When theadhesive force is lowered, the separation 18 a is caused in an interfacebetween the inner lead 16 a and the encapsulating material 13, or theseparation 18 b is caused in an interface between the die bond pad 15and the encapsulating material 13. The adhesion of copper to theencapsulating material after being subjected to the thermal history isseverely lowered. In the case of using the copper lead frame, the effectthereof is serious.

FIG. 2 is an enlarged view showing the separation and the crack shown inFIG. 1C. As shown in FIG. 2A, when the semiconductor device is subjectedto heat shock by repeated heat cycles in actual use, the crack 17 iscaused in the encapsulating material 13 starting from an edge of the diebond pad 15. Such a crack is caused by thermal stress due to adifference in physical property among the component materials of thepackage. In the worst case, the crack may reach the surface of theresin-sealed semiconductor device. When the crack reaches the surface ofthe package, water goes through the crack, and moisture resistancereliability is lowered. As shown in FIG. 2B, the separation 18 a betweenthe inner lead 16 a and the encapsulating material 13 causes a crack 19in the gold wire 14 by the heat cycles subsequently repeated during use,and in the worst case, breaking of the wire may occur. On the otherhand, the separation 18 b between the die bond pad 15 and theencapsulating material 13 causes a crack 17 extending from a corner ofthe die bond pad 15 by the subsequent heat cycle.

As a countermeasure against the above-described problems, the followingmethods and the like have been proposed and implemented for the purposeof suppressing the reduction of the adhesive force due to the moistureabsorption. In one method, the semiconductor device itself is packed inmoisture-proof packing, and the package is opened just before surfacemounting onto the motherboard for use. In another method, thesemiconductor device is dried at 100° C. for 24 hours just beforesurface mounting, and then the solder mounting is carried out.

However, such preprocessing methods have problems in that they require alonger manufacturing process and take time and effort. The presentinvention is to solve these problems, and an object of the presentinvention is to provide a resin-sealed semiconductor device whichovercomes the defects of the conventional QFP. The resin-sealedsemiconductor device can reduce the warpage of the semiconductor chipafter curing the die bonding material even in the case of using the Culead frame, and increase reliability of the connection between the innerlead and the die bond pad during solder mounting. Furthermore, theresin-sealed semiconductor device can suppress the crack starting fromthe edge of the die bond pad in the heat cycles.

SUMMARY OF THE INVENTION

In order to achieve the above-described object, one aspect of thepresent invention provides a resin-sealed semiconductor device, whichincludes a lead frame including a die bond pad and an inner lead, asemiconductor chip placed on the die bond pad with a die bondingmaterial interposed therebetween, and a encapsulating materialencapsulating the semiconductor chip and the lead frame, and propertiesof the die bonding material and the encapsulating material satisfy acertain relation. When a flexural strength of the encapsulating materialat 25° C. is σb; a shear strain energy of the encapsulating materialagainst the inner lead at a peak temperature during solder mounting isUi; and a shear strain energy of the encapsulating material against thedie bond pad at a peak temperature during solder mounting is Ud, theproperties of the die bonding material and the encapsulating materialafter curing satisfy at least one of the following equations (1), (2),and (3).

σe≦0.2×σb  equation (1)

Ui≧2.0×10⁻⁶ ×σei  equation (2)

Ud≧4.69×10⁻⁶ ×σed  equation (3)

Here,

σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁  equation (4);

σei=Ee ₂×(αe ₂ −αm)×ΔT ₂  equation (5);

σed=log(kd ₂)×Ee ₂×(αe ₂ −αm)×ΔT ₂  equation (6);

kd₁: a ratio of the flexural elastic modulus Ed₁ (MPa) of the diebonding material at 25° C. to an elastic modulus of 1 MPa (Ed₁>1 MPa);

kd₂: a ratio of the flexural elastic modulus Ed₂ (MPa) of the diebonding material at the peak temperature during the solder mounting toan elastic modulus of 1 MPa (Ed₂>1 MPa);

Ee₁: a flexural elastic modulus (MPa) of the encapsulating material at25° C.;

Ee₂: a flexural elastic modulus (MPa) of the encapsulating material atthe peak temperature during the solder mounting;

αe₁: an average coefficient of thermal expansion (1/° C.) of theencapsulating material from the formation temperature of thesemiconductor device to 25° C.;

αe₂: an average coefficient of thermal expansion (1/° C.) of theencapsulating material from the formation temperature of thesemiconductor device to the peak temperature during the solder mounting;

αm: a coefficient of thermal expansion (1/° C.) of the lead frame;

ΔT₁: a temperature difference (° C.) between the formation temperatureof the semiconductor device and a temperature on the low temperatureside of the heat cycle; and

ΔT₂: a temperature difference (° C.) between the formation temperatureof the semiconductor device and the peak temperature during the soldermounting.

Preferably, the flexural elastic modulus Ed₁ of the die bonding materialat 25° C. is in a range of 1 MPa to 300 MPa. Accordingly, the warpage ofthe semiconductor chip at 25° C. after curing of the die bondingmaterial can be effectively prevented.

Another aspect of the present invention provides a die bonding materialwhich contains an inorganic filler of 20-85 wt %, a resin component, anda stress-reducing agent constituting 40-70 wt % of a total amount of theresin component, and the flexural elastic modulus at the peaktemperature during the solder mounting is 70 MPa or less.

Still another aspect of the present invention provides an encapsulatingmaterial used for the resin-encapsulation of the semiconductor devicewhich contains epoxy resin expressed by the following general formula(I) and an inorganic filler. Here, the content of the inorganic filleris 82-90 wt % of the total amount. In the general formula (I), t-Burepresents a tertiary butyl group.

In the encapsulating material, the flexural elastic modulus at 25° C. is26 GPa or less, the average coefficient of thermal expansion from theformation temperature of the semiconductor device to 25° C. is0.7×10⁻⁵/° C. or more; the flexural strength at 25° C. is 120 MPa ormore; and the flexural elastic modulus at the peak temperature duringthe solder mounting is 650 MPa or less. The average coefficient ofthermal expansion from the formation temperature of the semiconductordevice to the peak temperature during the solder mounting is 5.0×10⁻⁵/°C. or less; the shear strain energy of the encapsulating materialagainst the inner lead at a peak temperature during solder mounting is1.35×10⁻⁶ N·m or more; and the shear strain energy of the encapsulatingmaterial against the die bond pad at a peak temperature during soldermounting is 6.8×10⁻⁶ N·m or more.

Other characteristics and effects of the present invention will befurther understood by embodiments to be described in detail below.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1C are views showing problems caused in processes ofmanufacturing, mounting and using a resin-sealed semiconductor device.

FIGS. 2A and 2B are views showing cracks and separation caused in theresin-sealed semiconductor device.

FIG. 3 is a graph showing a relation (25° C.) between the flexuralelastic modulus (MPa) of a die bonding material after curing at 25° C.and warpage (μm) of a chip.

FIG. 4 is a table showing the direction of physical properties ofmaterials (die bonding material, encapsulating material) required forreducing the warpage of the chip and improving heat cycle resistance.

FIGS. 5A to 5C are views for explaining the measurement of reflowresistance of the encapsulating material. FIG. 5A shows a test pieceused for the measurement. FIG. 5B shows the method of measuring a shearstrain energy using the test piece. FIG. 5C is a graph showing the shearstrain energy U obtained by integrating load F applied to theencapsulating material with respect to displacement x.

FIG. 6 is a partial cross-sectional view showing a resin-sealedsemiconductor device used for analysis of reflow resistance.

DETAILED DESCRIPTION OF EMBODIMENTS

A description will be made of principles for solving the above-describedproblems of warpage of a chip, cracks, and separation of members beforeembodiments of the present invention will be described in detail.

Assuming that curing temperature and curing time of a die bondingmaterial and outside dimensions of a semiconductor chip and a die bondpad remain constant, the warpage of the semiconductor chip at 25° C.after the chip is fixed on the die bond pad with the die bondingmaterial interposed therebetween and cured is influenced by (1) elasticmodulus of the die bonding material. As a result of various studiesfocusing on this influence, the inventors have found that among theelastic modulus of the die bonding material, flexural elastic modulus isa primary factor in the warpage of the chip and the warpage of the chipcan be suppressed by setting the flexural elastic modulus of the diebonding material after curing, that is, at 25° C., to 300 MPa or less. Acomposition realizing the die bonding material with a flexural elasticmodulus of 300 MPa or less will be described later in detail. However,the inventors have discovered that the die bonding material containingan inorganic filler of 20-85 wt %, a resin component, and astress-reducing agent constituting 40 wt % or more of the resincomponent can minimize the warpage of the chip.

The crack caused in the edge of the die bond pad by heat shock due to aheat cycle, that is, repetition of low temperature and high temperature,is considered to be influenced by (2) thermal stress in the edge of thedie bond pad and (3) flexural strength of the encapsulating material. Asa result of various studies focusing on such influence, the inventorshave found that the crack in the edge of the die bond pad caused in theheat cycle can be suppressed by setting the thermal stress of the edgeof the die bond pad and the flexural strength of the encapsulatingmaterial to satisfy a certain relation. Compositions of the die bondingmaterial and the encapsulating material satisfying this relation will bedescribed later in detail. For the die bonding material, one containingan inorganic filler of 20-85 wt %, a resin component, and a stressreducing agent constituting 70 wt % or less of the resin component isused. For the encapsulating material, one having a flexural elasticmodulus at 25° C. of 26 GPa or less, an average coefficient of thermalexpansion from a formation temperature of the semiconductor device to25° C. of 0.7×10⁻⁵/° C. or more, and a flexural strength at 25° C. of120 MPa or more is used. The inventors have found that a combination ofthese die bonding and encapsulating materials can suppress the crack ofthe edge of the die bond pad caused in the heat cycle.

The separation of an inner lead portion and a die bond pad portioncaused during solder mounting is considered to be influenced by (4)adhesivity of each portion and the encapsulating material after theencapsulating material absorbs moisture and (5) thermal stress caused bya difference in a material property between component materials of eachof the die bonding and the encapsulating materials, and the lead frame.As a result of various studies focusing on such influences, theinventors have found that the separation of the inner lead portion andthe die bond pad portion caused during the solder mounting can besuppressed when the adhesivity (shear strain energy) of each portion andthe encapsulating material at a peak temperature during the soldermounting, after the moisture absorption and the thermal stress caused bythe difference in the material property between the lead frame and eachcomponent material, satisfy a certain relation. Compositions of the diebonding material and the encapsulating material satisfying this relationwill be described later in detail. For the die bonding material, onecontaining an inorganic filler of 20-85 wt %, a resin component, and astress reducing agent constituting 40 wt % or more of the resincomponent is used. For the encapsulating material, one containing aninorganic filler of 82-90 wt % and epoxy resin represented by aparticular chemical formula is used. The inventors have found that acombination of these materials can suppress the separation of eachportion caused during the solder mounting.

As described above, in order to prevent the warpage of the chip, thecrack and the separation in the entire processes of manufacturing,mounting on a printed circuit board, and using of the semiconductordevice, and to maintain operational reliability of the semiconductordevice, all of the following would be considered:

(1) flexural elastic modulus of the die bonding material at 25° C.,

(2) thermal stress in the edge of the die bond pad in the heat cycle,

(3) flexural strength of the encapsulating material caused in the heatcycle,

(4) shear strain energy between the encapsulating material and the leadframe (inner lead portion, die bond pad portion) during the soldermounting,

(5) thermal stress in the interface between the encapsulating materialand the lead frame (inner lead portion, die bond pad portion) during thesolder mounting.

Hereinafter, these factors will be described in detail.

<Die Bonding Material for Reducing Warpage of a Semiconductor Device>

First, a description will be made of a point wherein the warpage of thesemiconductor device is largely influenced by the elastic modulus of thedie bonding material.

For the lead frame material (including the die bond pad portion and theinner lead portion) for use in the semiconductor device, generally, acopper alloy or an iron-nickel alloy is widely used. The coefficient ofthermal expansion of the lead frame differs depending on the materialused. For example, the coefficient of thermal expansion of a copperalloy is 1.7×10⁻⁵/° C., and that of an iron-nickel alloy is 0.5×10⁻⁵/°C. The warpage of the semiconductor chip is largely influenced by thecoefficient of thermal expansion of the lead frame. The larger thedifference in the coefficient of thermal expansion between the chip andthe lead frame (especially, the die bond pad portion) is, the larger theinfluence is.

In the case of using an iron-nickel alloy for the lead frame, thedifference in the coefficient of thermal expansion from thesemiconductor chip is small, so that the warpage of the semiconductorchip is small and does not become a problem. However, consideringelectrical properties such as conductivity, operational properties, andheat release properties, request for using the lead frame of a copperalloy has being increased. However, in the case of using the lead frameof a copper alloy, the difference in the coefficient of thermalexpansion from the semiconductor chip is large, so that the warpage ofthe semiconductor chip is large.

In the semiconductor device, when the semiconductor chip mainly composedof silicon is mounted on the lead frame of a copper alloy, the physicalproperties of the chip and the lead frame are substantially specified.Accordingly, by adjusting properties of the die bonding material bondingthe semiconductor chip and the die bond pad, the warpage of the chipshould be suppressed.

FIG. 3 shows the result of an examination on the relation between thewarpage of the chip and the physical properties of the die bondingmaterial using a commercially available warpage deformation analysistool. From this result, it is understood that the warpage of the chip isscarcely influenced by the coefficient of thermal expansion of the diebonding material and largely influenced by the flexural elastic modulus.Actually, the chip of 8 mm×10 mm×0.28 mm was fixed on the die bond padof the lead frame using the die bonding materials with differentflexural elastic moduli under curing conditions of 150° C. for 1 hour,and the warpage of the chip was measured at 25° C. Since the measurementvalues agree well with the analysis result, regarding the warpage of thechip, it is sufficient to consider only the flexural elastic modulus ofthe die bonding material. The flexural elastic modulus of the diebonding material was measured in accordance with JIS-K-6911 at 25° C.

When the chip of 8 mm×10 mm is used as a test piece, the warpage of thechip up to about 30 μm does not affect functions or the a structure ofthe semiconductor chip. In order to control the warpage of the chipwithin a range of 30 μm or less, from the graph in FIG. 3, the flexuralelastic modulus Ed₁ would be set to 300 MPa or less.

The die bonding material with a flexural elastic modulus Ed₁ of 300 MPaor less at 25° C. may be either in paste form or in film form.Preferably, as to the composition, the die bonding material contains aninorganic filler of 20-85 wt %, a resin component, and a stress-reducingagent constituting 40 wt % of the total amount of the resin component.

Examples of the inorganic filler include fused silica, crystallinesilica, spherical silica, alumina, calcium carbonate, zirconiumsilicate, calcium silicate, talc, clay, mica, boron nitride, aluminumhydroxide, silver powder, copper powder or nickel powder. If the contentof the inorganic filler in the die bonding material is less than 20 wt %or more than 85 wt %, workability is lowered in applying or sticking thedie bonding material to the die bond pad portion.

Examples of the resin component suitably used include cresol novoractype epoxy resin, bisphenol F type epoxy resin, bisphenol AD type epoxyresin, and acrylic resin. The die bonding material also contains acuring agent and an accelerator in addition to the main ingredient. Whenneeded, a coupling agent, reactive diluent, and the like are used inaddition.

Examples of the stress-reducing agent include a butadiene-acrylonitrilebase copolymer, a modified copolymer having an amino group, an epoxygroup, or a carboxyl group on an end or a side chain thereof, abutadiene family flexibilizer such as an acrylonitrile-butadiene-styrenecopolymer, silicone family elastomer having an amino group, a hydroxylgroup, an epoxy group, or a carboxyl group on an end or a side chainthereof. The blending of the stress reducing agent can reduce theflexural elastic modulus of the die bonding material, thus reducing thewarpage of the semiconductor chip in fixing the semiconductor chip tothe die bond pad portion. Preferably, the composition of the stressreducing agent is set to 40 wt % or more of the total amount of theresin component. If the composition is less than 40 wt %, the flexuralelastic modulus of the die bonding material cannot be sufficientlyreduced, and the warpage of the semiconductor chip cannot be reduced.

In the die bonding material used in the present invention, anion-trapping agent may be blended in addition to the stress-reducingagent. The use of the die bonding material with such a composition cansuppress the warpage of the semiconductor chip caused after curing ofthe die bonding material.

The present invention is suitably applied to the resin-sealedsemiconductor device particularly using a lead frame of a copper alloy.In the embodiment, particularly, it is preferable to use a lead frame ofa copper alloy having a surface plated with any one of silver, gold, orpalladium.

<Die Bonding Material and Encapsulating Material for Preventing a Crackin a Heat Cycle>

As described above, the crack caused by the heat cycle is influenced bythermal stress σ in the edge of the die bond pad and the flexuralstrength σ_(b) of the encapsulating material.

The thermal stress σ in the edge of the die bond pad is expressed by thefollowing equation when an elastic modulus of the encapsulating materialat 25° C. is Ee₁, a coefficient of thermal expansion of theencapsulating material at 25° C. is αe₁, and a coefficient of thermalexpansion of the lead frame is αm. The subindex 1 of each parameterindicates that the parameter is on a low temperature side (25° C. orless).

σ=k×σe  equation (7)

σe=(1/log(kd ₁))×Ee ₁ ×αd×ΔT ₁  equation (8)

αd=αm−αe ₁  equation (9)

Here,

k: a coefficient depending on the package structure or the lead framestructure;

σe: a property represented by a physical property of the componentmaterial as an index of the thermal stress;

kd₁: a ratio of a flexural elastic modulus Ed₁ (Ed₁>1 MPa) of the diebonding material (after curing) at 25° C. to an elastic modulus of 1MPa;

αd: a difference (αm−αe₁) in the coefficient of thermal expansionbetween the lead frame and the encapsulating material; and

ΔT₁: a temperature difference between the formation temperature of thesemiconductor device and the temperature in the low temperature side ofthe heat cycle.

From the equation (7), it is understood that the thermal stress σ causedin the edge of the die bond pad is proportional to the property σe.

On the other hand, the flexural strength σb (MPa) of the encapsulatingmaterial is obtained from the following equation by carrying out aflexural test in accordance with JIS-K-6911. The test piece is obtainedby curing and shaping the encapsulating material into a predeterminedsize with a transfer press and post-curing at 175° C. for five hours.

σb=(3×L×P)/(2×W×H ²)  equation (10)

Here, L is a span (mm); P is a load (N); W is a width (mm) of the testpiece; H is a thickness (mm) of the test piece; and the measurementtemperature is a room temperature of 25° C.

In order to suppress the crack in the edge of the die bond pad caused inthe heat cycle, it is necessary to increase the flexural strength σb ofthe encapsulating material and reduce the thermal stress caused in thedie bond pad, that is, the property σe. However, even if the flexuralstrength σb is high, when the property σe is also large, the crack iscaused in the edge of the die bond pad. Inversely, even if the flexuralstrength σb is somewhat low, when the property σe is also small, thecrack is not caused in the edge of the die bond pad. Accordingly, it isimportant that the flexural strength σb and the property σe are set soas to be well balanced.

The inventors have made various studies on a relation between theflexural strength σb of the encapsulating material and the property σeand analyzed experimental examples to be described later. As a result,the inventors have discovered that a ratio (σe/σb) of the property σe tothe flexural strength σb set to 0.2 or lower allows the crack in theedge of the die bond pad caused in the heat cycle to be suppressed.

In order to set the ratio (σe/σb) of the property σe to the flexuralstrength σb of the encapsulating material set to 0.2 or lower, asapparent from the equation (8), it is necessary to increase the flexuralelastic modulus Ed₁ of the die bonding material, reduce the flexuralelastic modulus Ee₁ of the encapsulating material, increase thecoefficient αe₁ of thermal expansion of the encapsulating material, andincrease the flexural strength σb of the encapsulating material.Specifically, as determined based on the analysis of the experiments tobe described later, desirably, the flexural elastic modulus Ed₁ of thedie bonding material is set to 1 MPa or more, the flexural elasticmodulus Ee₁ of the encapsulating material is set to 26 GPa or less, thecoefficient of thermal expansion αe₁ of the encapsulating material isset to 0.7×10⁻⁵/° C. or more, and the flexural strength σb of theencapsulating material is set to 120 MPa or more.

When the flexural strength of the encapsulating material is less than120 MPa, the coefficient of thermal expansion thereof is less than0.7×10⁻⁵/° C., and the flexural elastic modulus thereof is more than 26GPa, in some cases, the ratio (σe/σb) of the property σe to the flexuralstrength σb is increased beyond 0.2. Accordingly, the crack cannot besufficiently prevented.

The plating of the surface layer of the lead frame differs depending onthe types of the lead frame. Since the crack in the edge of the die bondpad can be explained by the ratio (σe/σb) of the property σe to theflexural strength σb of the encapsulating material, the plating of thesurface layer of the lead frame is not particularly limited.Accordingly, a plating of silver, gold, palladium, or the like can begenerally used. Typically, a the lead frame having the inner leadportion with a length of 1 to 20 mm, a width of 0.1 to 1 mm, and athickness of 0.1 to 0.5 mm and the die bond pad portion with an outsidedimensions of 2 mm×2 mm to 20 mm×20 mm and a thickness of 0.1 to 0.5 mmis suitably used. For example, in some cases, only the inner leadportion is plated in order to improve a wire bonding property.

The flexural elastic module Ee₁ and Ed₁ of the encapsulating materialand the die bonding material are obtained by preparing cured products ofthe encapsulating material and the die bonding material and carrying outtests in accordance with JIS-K-6911 at 25° C. The coefficient σe, ofthermal expansion of the encapsulating material is calculated from agradient from the formation temperature of the semiconductor device to25° C. by preparing the cured product of the encapsulating material andcarrying out measurement by use of a thermomechanical analyzer.

In the resin-sealed semiconductor device using the encapsulatingmaterial and the die bonding material satisfying the above-describedrelation σe/σb≦0.2, even if the semiconductor device is subjected to asevere heat shock such as that in the heat cycle, the crack in the edgeof the die bond pad can be suppressed.

The die bonding material satisfying the above-described relation may beeither in paste form or in film form. As to the composition, the diebonding material contains the inorganic filler of 20-85 wt %, the resincomponent, and the stress-reducing agent constituting 70 wt % or less ofthe total amount of the resin component. In addition, the curing agentand the accelerator are used, and the coupling agent, the reactivediluent, a solvent, and the like are used as needed. The ion-trappingagent may be blended therein. For materials of the inorganic filler andthe stress reducing agent among these agents, the same materials as thatof the inorganic filler and the stress-reducing agent used for the diebonding material described in connection with the warpage of thesemiconductor device are used, The resin component may be typical resin.Among the resin, cresol novorac type epoxy resin, bisphenol F epoxy typeresin, bisphenol AD type epoxy resin, and acrylic resin, are suitablyused.

When the content of the inorganic filler is less than 20 wt % or morethan 85 wt % of the total die bonding material, workability is loweredin applying and sticking the die bonding material to the die bond padportion. On the other hand, the thermal stress of the die bond padportion is influenced by the flexural elastic modulus of the die bondingmaterial. As the flexural elastic modulus of the die bonding material isreduced, the thermal stress in the edge of the die bond pad isincreased, and the relation σe/σb≦0.2 cannot be satisfied. Therefore,preferably, the content of the stress-reducing agent is set to 70 wt %or less of the total amount of the resin component excluding the solventand the inorganic filler. The content of more than 70 wt % allows theflexural elastic modulus of the die bonding material to be considerablyreduced and is effective for preventing the warpage of the chip, but thethermal stress in the edge of the die bond pad in the heat cycle cannotbe reduced.

FIG. 4 is a table showing the direction of physical properties ofmaterials (die bonding material, encapsulating material) required forreducing the warpage of the chip and improving heat cycle resistance.Since the warpage of the chip is caused before being sealed with resin,the parameters of the encapsulating materials are not concerned with thewarpage of the chip. It is the properties of the die bonding materialthat have an influence on both the warpage of the chip and the heatcycle resistance. In order to control the warpage of the chip to besmall, it is desirable that the flexural elastic modulus of the diebonding material is small. However, in the heat cycle, it is desirablethat the flexural elastic modulus is large as described above.Accordingly, in order to maintain the reliability of a product aftermounting the semiconductor chip on the die bond pad and in the heatcycle after encapsulating with the encapsulating material, the range ofthe flexural elastic modulus of the die bonding material needs to beoptimally set.

Specifically, the flexural elastic modulus of the die bonding materialis preferably 1 MPa or more but not exceeding 300 MPa. The die bondingmaterial realizing such a flexural elastic modulus preferably containsthe stress-reducing agent constituting 40 wt % or more but not exceeding70 wt % of the total amount of the resin component.

On the other hand, the encapsulating material used in the presentinvention is generally in powder form or in tablet form. As long as theencapsulating material has a flexural elastic modulus of 26 GPa or less,a coefficient of thermal efficient of 0.7×10⁻⁵/° C. or more, and aflexural strength σb of 120 MPa or more, the main ingredient is notparticularly limited. Examples thereof suitably used include biphenyltype epoxy resin and cresol novorac type epoxy resin. In theencapsulating material, the curing agent, the accelerator, and theinorganic filler are contained in addition to the main ingredient. Asneeded, a flame retardant, the coupling agent, wax, and the like areused in addition. In the encapsulating material used in the presentinvention, silicone oil, a rubber component such as silicone rubber andsynthetic rubber may be blended, or the ion-trapping agent may beblended. The method of encapsulating the semiconductor chip by use ofsuch a encapsulating material is not particularly limited. Thesemiconductor chip can be sealed by a known molding method such as themethod carried out in a typical transfer molding or the like.

The resin-sealed semiconductor device thus obtained is excellent inresistance to the warpage of the semiconductor chip and the heat cycleresistance. Even when the resin-sealed semiconductor device is subjectedto severe heat shock, the crack can be prevented from being caused fromthe edge of the die bond pad.

<Encapsulating Material and Die Bonding Material for PreventingSeparation During Solder Mounting>

In the solder mounting, the separation in the interface between theinner lead portion and the encapsulating material and the separation inthe interface between the die bond pad portion (rear face) and theencapsulating material becomes a problem. The separation is influencedby the adhesivity (shear strain energy) between each of the inner leadportion and the die bonding portion and the encapsulating material afterthe encapsulating material absorbs moisture and the thermal stresscaused in the interface between each of these members and theencapsulating material. As described above, when the shear strain energybetween each portion and the encapsulating material and the thermalstress satisfy a certain relation at a peak temperature during thesolder mounting, the separation can be eliminated.

The thermal stress σi caused in the interface between the inner leadportion and the encapsulating material during the solder mounting isexpressed by the following equation when an elastic modulus of theencapsulating material is Ee₂, a coefficient of thermal expansion of theencapsulating material is αe₂, and a coefficient of thermal expansion ofthe lead frame is σm. The subindex 2 of each parameter indicates thatthe parameter is on the high temperature side.

σi=k×σei  equation (11)

σei=Ee ₂ ×αd×ΔT ₂  equation (12)

αd=αe ₂ −αm  equation (13)

The thermal stress ad caused in the interface between the die bond padportion and the encapsulating material is expressed by the followingequation.

σd=k×σed  equation (14)

σed=log(kd ₂)×Ee ₂ ×αd×ΔT ₂  equation (15)

Here,

k: a coefficient depending on the package structure or the lead framestructure;

σei, σed: properties represented by a physical property of the componentmaterials as an index of the thermal stress;

kd₂: a ratio of a flexural elastic modulus Ed₂ (Ed₂>1 MPa) of the diebonding material at the peak temperature during the solder mounting toan elastic modulus of 1 MPa;

αd: a difference (αm−αe₁) in the coefficient of thermal expansionbetween the encapsulating material and the lead frame on the hightemperature side; and

ΔT₂: a temperature difference between the formation temperature of thesemiconductor device and the peak temperature during the soldermounting.

The thermal stress caused in the inner lead portion is proportional tothe property σei, and the thermal stress cased in the die bond padportion is proportional to the property σed.

On the other hand, the shear strain energy U (N·m) at the peaktemperature during the solder mounting between each of the inner leadportion and the die bond pad portion of the lead frame and theencapsulating material is obtained from a force (that is, load) appliedto the encapsulating material in shearing and a displacement due to theforce. Specifically, a test piece shown in FIG. 5A is prepared. Afterabsorbing moisture under the predetermined conditions, as shown in FIG.5B, the test piece is left for 20 seconds on a hot plate 22 of a shearadhesion strength tester set to the peak temperature during the soldermounting. Subsequently, while a test head 21 is moved at 50 μm/sec, loadis applied to the encapsulating material 13, and the load F (N) and thedisplacement x (m) of the encapsulating material 13 are measured. Theshear strain energy U is then obtained by the following equation.

U=∫F·dx   equation (16)

In other words, the shear strain energy U is obtained by integrating theload F with respect to the displacement x as shown by the shaded area inFIG. 5C.

The test piece shown in FIG. 5A is obtained in the following manner. Theencapsulating material 13 is cured and formed into a size of 1 mm heightand 3.7 mm diameter on the lead frame 20 by the transfer press, the leadframe 20 having the same material and the same plating specification asthose of the inner lead portion or the die bond pad portion. Theresultant structure is then post-cured at 175° C. for five hours.

When a moisture absorption time of the semiconductor device is t1 (h); amoisture absorption time of the test piece is t2 (h); a thickness of theencapsulating material from the surface of the semiconductor device tothe inner lead portion or the die bond pad is h1 (mm); and a thicknessof the encapsulating material of the test piece is h2 (mm), thefollowing relational expression is obtained between these parametersusing Fick's diffusion equation.

t1/t2=0.92×(h1/h2)²+0.24  equation (17)

The moisture absorption time t2 of the test piece is determined fromthis relational expression. For example, when the actual moistureabsorption time t2 of the semiconductor device is 168 hours, thethickness h1 of the encapsulating material from the surface of thesemiconductor device to the inner lead portion is 0.625 mm as shown inFIG. 6, and the thickness h2 of the encapsulating material of the testpiece is 1.0 mm as shown in FIG. 5A, the moisture absorption time t2 ofthe test piece is determined to be about 280 hours from the equation(17).

In order to suppress the separation of the inner lead portion and thedie bond pad portion caused during the solder mounting, it is necessarythat the shear strain energy Ui of the encapsulating material againstthe inner lead portion and the shear strain energy Ud of theencapsulating material against the die bond pad portion are set high,and the properties σei and σed are set low. However, even if the shearstrain energies Ui and Ud are high, when the properties σei and σed arealso high, the separation may be caused in the inner lead portion andthe die bond pad portion in some cases. On the other hand, even if theshear strain energies Ui and Ud is low, when the properties σei and σedare low, the separation may not be caused in the inner lead portion andthe die bond pad portion in some cases. Accordingly, it is importantthat the shear strain energies Ui and Ud in the inner lead portion andthe die bond pad portion and the corresponding properties σei and σedare set so as to be well balanced.

The inventors have made various studies on relations between the shearstrain energies Ui (N·m) and Ud(N·m) and the properties σei and σed andperformed an experimental analysis to be described later. As a result,it has been understood that the separation of the inner lead portion andthe die bond pad portion caused during the solder mounting can besuppressed by setting as follows:

the ratio (Ui/σei) of the shear strain energy Ui to the propertyσei2.0×10⁻⁶, and

the ratio (Ud/σed) of the shear strain energy Ud to the propertyσed≧4.69×10⁻⁶.

In order to set the ratio (Ui/σei) of the shear strain energy Ui to theproperty σei to 2.0×10⁻⁶ or more and set the ratio (Ud/σed) of the shearstrain energy Ud to the property σed to 4.69×10⁻⁶ or more, the followingconditions are derived from the result of the experimental analysis tobe described later.

The flexural elastic modulus (Ed₂) of the die bonding material at thepeak temperature during the solder mounting ≦70 MPa.

The flexural elastic modulus (Ee₂) of the encapsulating material at thepeak temperature during the solder mounting ≦650 MPa.

The coefficient (αe₂) of thermal expansion of the encapsulating materialat the peak temperature during the solder mounting ≦5.0×10⁻⁵/° C.

The shear strain energy (Ui) of the encapsulating material ≧1.35×10⁻⁶N·m. The shear strain energy (Ud) of the encapsulating material≧6.8×10⁻⁶ N·m.

In the resin-sealed semiconductor device manufactured using the diebonding material and the encapsulating material satisfying suchconditions, even at high temperature such as during the solder mountingthereof onto the printed circuit board, the separation in the interfacebetween the inner lead portion of the lead frame and the encapsulatingmaterial or the separation in the interface between the die bond padportion and the encapsulating material can be effectively prevented.Accordingly, product reliability can be improved.

When the flexural elastic modulus of the die bonding material is morethan 70 MPa, the flexural elastic modulus of the encapsulating materialis more than 650 MPa, and the coefficient of thermal expansion of theencapsulating material is more than 5.0×10⁻⁵/° C. at the peaktemperature during the solder mounting, and the shear strain energy ofthe encapsulating material against the die bond pad portion is less than6.8×10⁻⁶ N·m, the ratio (Ud/σed) of the shear strain energy Ud to theproperty σed in the die bond pad portion becomes less than 4.69×10⁻⁶.Accordingly, the separation of the die bond pad portion cannot besufficiently suppressed.

Similarly, when the flexural elastic modulus of the encapsulatingmaterial is more than 650 MPa, the coefficient of thermal expansion ofthe encapsulating material is more than 5.0×10⁻⁵/° C., and the shearstrain energy of the encapsulating material against the inner leadportion is less than 1.35×10⁻⁶ N·m, the ratio (Ui/σei) of the shearstrain energy Ui to the property σei in the inner lead portion becomesless than 2.0×10⁻⁶. Accordingly, the separation of the inner leadportion cannot be sufficiently suppressed.

The shear strain energy of the encapsulating material against the innerlead portion or the die bond pad portion varies depending on the platingof the surface layer of the lead frame. However, even in the case ofdifferent plating, the separation of the inner lead portion or the diebond pad portion can be explained by the ratio of the shear strainenergy Ui and Ud to the properties σei and σed. Accordingly, the platingof the surface layer of the lead frame is not particularly limited andgenerally uses plating containing any one of silver, gold, or palladium.

The flexural elastic moduli of the die bonding material and theencapsulating material is obtained by preparing cured products of thedie bonding material and the encapsulating material, and carrying outtests in accordance with JIS-K-6911 under the atmosphere of the peaktemperature (for example, 245° C.) during the mounting. The coefficientof thermal expansion is calculated from a gradient from the formationtemperature of the resin-sealed semiconductor device to the peaktemperature during the solder mounting by preparing the cured product ofthe encapsulating material and carrying out measurements by use of thethermomechanical analyzer.

As previously described, the encapsulating material satisfying theabove-described conditions is typically in powder form or in tabletform. For the main ingredient of the encapsulating material, althoughnot particularly limited, biphenyl type epoxy resin, cresol novolac typeepoxy resin, or the like is suitably used. Furthermore, epoxy resinexpressed by the following general formula has a small flexural elasticmodulus at high temperature and can reduce the thermal stress of theinner lead portion and the die bond pad portion.

In the case of using the epoxy resin of the formula (I) in theencapsulating material, it is desirable that the encapsulating materialcontains the epoxy resin of 10 wt % or more of the total amount of theresin component in the encapsulating material, more preferably, 20 wt %or more. In the case of less than 10 wt %, sufficient low elasticitycannot be achieved, and the thermal stress in the inner lead portion andthe die bond pad cannot be reduced.

The encapsulating material contains the curing agent, the accelerator,and the inorganic filler in addition to the main ingredient. As needed,a flame retardant, a coupling agent, wax or the like are used inaddition. Preferably, the content of the inorganic filler is set to 80wt % or more and less than 95 wt % of the total amount of theencapsulating material. Particularly, the range from 82 wt % to 90 wt %is preferred. When the content thereof is less than 80 wt %, since thesaturated water absorption of the encapsulating material is increased,the shear adhesivity after the moisture absorption is reduced. Moreover,the coefficient of thermal expansion is increased, so that the thermalstress is increased. On the other hand, when the content thereof is morethan 95 wt %, since the viscosity of the encapsulating material at thetransfer molding is increased, wire sweep or molding defect may easilyoccur. Moreover, the flexural elastic modulus of the cured product ofthe encapsulating material is increased, so that the thermal stress isincreased.

Moreover, in the encapsulating material, the stress-reducing agent suchas silicone oil, silicone rubber, and synthetic rubber may be blended,and the ion-trapping agent may be blended. When the stress-reducingagent is blended, the elastic modulus of the encapsulating material canbe reduced, and thus the thermal stress of each portion can be reduced.Preferably, the content of the stress-reducing agent is set to 5 wt % ormore of the total amount of the resin component. The method ofencapsulating the semiconductor chip by use of such a encapsulatingmaterial is not particularly limited. The semiconductor chip can besealed by a known mold method such as the method carried out in atypical transfer molding or the like.

The die bonding material satisfying the above-described conditions istypically in paste form or in film form as described above. Preferably,the content of the inorganic filler is set to 20-85 wt % of the totalamount of the die bonding material, and the content of thestress-reducing agent is set to 40 wt % of the total amount of the resincomponent.

The combination of the above-described die bonding material andencapsulating material allows for a semiconductor device excellent inresistance to the warpage of the semiconductor chip, heat cycleresistance, and solder mounting property.

EXAMPLES

Specific examples will be described below.

The raw materials shown in table 1 were used, and the encapsulatingmaterials A to J were prepared in accordance with the compositions shownin table 2. On the other hand, the raw materials shown in table 3 wereused, and the die bonding materials I to IV were prepared in accordancewith compositions shown in table 4.

TABLE 1 Raw materials for sealing material Raw material Compound nameEpoxy resin 1 ESCN-190-2 (cresol novolac type epoxy resin, trade name ofSumitomo Chemical Co., Ltd.,) 2 ESLV-210 (stilbene type epoxy resin,trade name of Sumitomo Chemical Co., Ltd.) 3 YSLV-120TE (sulfide typeepoxy resin, trade name of Nippon Steel Chemical Co., Ltd.) 4 YX-4000H(biphenyl type epoxy resin, trade name of Yuka shell epoxy K. K.) Curingagent XL-225 (phenyl aralkyl resin, trade name of Mitsui Chemicals,Inc.) Accelerator adduct of triphenylphosphine and p-benzoquinone Flameretardant ESB-400T (brominated bisphenol A epoxy resin, trade name ofSumitomo Chemical Co., Ltd.) Auxiliary antimony trioxide flame retardantStress-reducing silicone powder agent Release agent carnauba waxColorant carbon black Coupling agent γ-glicidoxypropyltrimethoxy silaneInorganic filler spherical silica with average grain size of 17.5 μm

TABLE 2 Composition of encapsulating material Encapsulating material Rawmaterial A B C D E F G H I J Epoxy resin-1 — — — — — — — — 85.0 42.5Epoxy resin-2 — — — — — — — — — 42.5 Epoxy resin-3 85.0 85.0 85.0 85.085.0 85.0 — — — — Epoxy resin-4 — — — — — — 85.0 85.0 — — Curing agent65.0 65.0 65.0 65.0 65.0 65.0 81.2 81.2 81.5 78.9 Accelerator 3.0 3.03.0 3.0 3.0 3.0 3.0 3.0 2.0 3.0 Flame retardant 15.0 15.0 15.0 15.0 15.015.0 15.0 15.0 15.0 15.0 Auxiliary flame retardant 6.0 15.0 6.0 15.0 6.015.0 6.0 6.0 6.0 6.0 Stress reducing agent — 15.0 — 15.0 — 15.0 — — — —Release agent 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Colorant 2.6 2.62.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 Coupling agent 7.5 7.5 7.5 7.5 7.5 7.57.5 7.5 7.5 7.5 Inorganic filler (spherical 740 800 1044 1129 1392 15051514 703 1132 1123 form)

TABLE 3 Raw materials for die bonding material Raw material Compoundname and property Epoxy resin 1 YDCN702S (cresol novolac type epoxyresin, trade name of Tohto Kasei Co., Ltd.) 2 EXA-830CRP (bisphenyl Ftype epoxy resin, trade name of DAINIPPON INK AND CHEMICALS, Inc.)Curing agent VR-9300 (phenol novolac resin, trade name of Mitsui ToatsuChemicals, Inc.) Accelerator imidazoles Stress-reducing CTBNX-1009SP(carboxyl group terminated butadiene agent acrylonitrile rubber, tradename of Ube Industries, Ltd.) Reactive diluent t-butylphenylglycidylether (trade name of Asahi Denka Co., Ltd.) Solvent2(2-ethoxyethoxy)ethyl acetate Inorganic filler grayish white silverpowder of flakes

TABLE 4 Composition of die bonding material Die bonding material Rawmaterial I II III IV Epoxy resin-1 — — — 3 Epoxy resin-2 22  13  7 —Curing agent 3 3 3 1 Accelerator 1 1 1 1 Stress-reducing agent — 9 15  9Reactive diluent 6 6 6 — Solvent — — — 16  Inorganic filler 68  68  68 70 

Using the die bonding material of each composition shown in Table 4, asemiconductor chip was arranged on the die bond pad of the lead frameand fixed by curing at 150° C. for 1 hour. The semiconductor chip hadoutside dimensions of 8.0 mm×10.0 mm and a thickness of 0.28 mm. A leadframe of a copper alloy with the tip of the inner lead portion platedwith silver was used. The lead frame had a coefficient of thermalexpansion of 1.7×10⁻⁵/° C. The inner lead portion had a length of 2 to5.6 mm, a width of 0.185 mm, and a thickness of 0.15 mm, and the diebond pad portion had outside dimensions of 8.4 mm×10.4 mm and athickness of 0.15 mm.

For each semiconductor chip thus obtained, warpage measurement of thesemiconductor chip at 25° C. was carried out. The warpage of thesemiconductor chip was measured by scanning 9 mm in the top face of thechip by use of a surface roughness tester. The results thereof are shownin tables 6 to 9 below.

Subsequently, using each encapsulating material shown in the table 2,the semiconductor chip was molded by transfer molding at 175° C. at 6.9MPa for 90 seconds and then post-cured at 175° C. for five hours, thusobtaining a resin-sealed semiconductor device. The semiconductor devicewas an 80-pin QFP with outside dimensions of 14 mm×20 mm and a thicknessof 1.4 mm. Specifically, the semiconductor device was the same as thatshown in FIG. 6. The thickness of the encapsulating material from thesurface thereof to the inner lead portion was 0.625 mm, and thethickness of the encapsulating material from the surface thereof to thedie bond pad portion was 0.475 mm.

The combinations of the encapsulating materials A to J and the diebonding materials I to IV in preparing the semiconductor devices areshown in table 5. Five samples were prepared for each of the fortytypes, and the experiments on the respective types are shown asexperimental examples 1 to 40.

TABLE 5 Experimental  1  2  3  4  5  6  7  8  9 10 example EncapsulatingA B C D E F G H I J material Die bonding material I Experimental 11 1213 14 15 16 17 18 19 20 example Encapsulating A B C D E F G H I Jmaterial Die bonding material II Experimental 21 22 23 24 25 26 27 28 2930 example Encapsulating A B C D E F G H I J material Die bondingmaterial III Experimental 31 32 33 34 35 36 37 38 39 40 exampleEncapsulating A B C D E F G H I J material Die bonding material IV

Using each sample of the resin-sealed semiconductor device shown inTable 5, a solder mounting test and a heat cycle resistance test werecarried out.

The solder mounting test was carried out at the peak temperature duringthe solder mounting of 245° C. with the number of cycles being threeafter being subjected to the moisture absorption at 85° C. and 85% RHfor 168 hours in accordance with JEDEC (Joint Electron DeviceEngineering Council) LEVEL 1. The separation of the inner lead portionand the die bonding pad portion was then observed with an ultrasonicinspection and imaging instrument.

The heat cycle resistance test was in accordance with MIL standards(STD-883E condition C), and each semiconductor device was subjected to1000 heat cycles, where exposure to 150° C. for 15 minutes and exposureto 65° C. for 15 minutes corresponds to one cycle. The crack in the edgeof the die bond pad was observed by cross-sectional observation.

The tables 6 to 9 show the result of the measurement of the crack in theedge of the die bond pad portion after 1000 heat cycles, with thewarpage of the semiconductor chip. The table 10 shows the result ofmeasurement of the separation of the inner lead portion after the soldermounting test. Tables 11, 12 and 13 show the result of measuring theseparation of the die bond pad after the solder mounting test. The shearstrain energy of the inner lead portion and the encapsulating materialwas measured by setting the moisture absorption time of the test pieceto 280 hours obtained by the equation (17) since the moisture absorptiontime of the semiconductor device was 168 hours, the thickness of theencapsulating material from the surface thereof to the inner leadportion was 0.625 mm, and the thickness of the encapsulating material ofthe test piece was 1.0 mm. Similarly, the shear strain energy of the diebond pad portion and the encapsulating material was measured by settingthe moisture absorption time of the test piece to 375 hours obtained bythe equation (17) since the moisture absorption time of thesemiconductor device was 168 hours, the thickness of the encapsulatingmaterial from the surface thereof to the die bond pad portion was 0.475mm, and the thickness of the encapsulating material of the test piecewas 1.0 mm.

TABLE 6 Samples 1-10 (chip warpage, heat cycle resistance) Experimentalexample 1 2 3 4 5 6 7 8 9 10 Coefficient αm of 1.7 thermal expansion oflead frame (×10⁻⁵/° C.) Flexural elastic 3753 modulus Ed₁ of die bondingmaterial (MPa) Flexural elastic 18220 16460 22980 20600 25390 2475025070 16560 24100 22310 modulus Ee₁ of encapsulating material (MPa)Coefficient αe₁ of 1.37 1.26 1.07 0.92 0.79 0.74 0.74 1.46 1.05 1.07thermal expansion of encapsulating material (×10⁻⁵/° C.) Flexuralstrength σb of 144.26 130.25 144.78 127.22 153.87 133.07 175.62 162.55156.17 173.21 encapsulating material (MPa) Temperature 240 differenceΔT₁ (° C.) σe (MPa) 4.04 4.86 9.72 10.79 15.51 15.95 16.16 2.67 10.529.44 σe/σb 0.03 0.04 0.07 0.08 0.1 0.12 0.09 0.02 0.07 0.05 Number ofsamples 0 0 0 0 0 0 0 0 0 0 causing cracking in die bond pad edge afterheat cycle resistance test (/five samples) Warpage amount of 40semiconductor chip after curing die bonding material (μm)

TABLE 7 Samples 11-20 (chip warpage, heat cycle resistance) Experimentalexamle 11 12 13 14 15 16 17 18 19 20 Coefficient αm of 1.7 thermalexpansion of lead frame (×10⁻⁵/° C.) Flexural elastic 874 modulus Ed₁ ofdie bonding material (MPa) Flexural elastic 18220 16460 22980 2060025390 24750 25070 16560 24100 22310 modulus Ee₁ of encapsulatingmaterial (MPa) Coefficient αe₁ of 1.37 1.26 1.07 0.92 0.79 0.74 0.741.46 1.05 1.07 thermal expansion of encapsulating material (×10⁻⁵/° C.)Flexural strength σb of 144.26 130.25 144.78 127.22 153.87 133.07 175.62162.55 156.17 173.21 encapsulating material (MPa) Temperature 240difference ΔT₁ (° C.) σe (MPa) 4.91 5.91 11.81 13.11 18.85 19.39 19.643.24 12.78 11.47 σe/σb 0.03 0.05 0.08 0.10 0.12 0.15 0.11 0.02 0.08 0.07Number of samples 0 0 0 0 0 0 0 0 0 0 causing cracking in die bond padedge after heat cycle resistance test (/five samples) Warpage amount of39 semiconductor chip after curing die bonding material (μm)

TABLE 8 Samples 21-30 (chip warpage, heat cycle resistance) Experimentalexample 21 22 23 24 25 26 27 28 29 30 Coefficient αm of 1.7 thermalexpansion of lead frame (×10⁻⁵/° C.) Flexural elastic 201 modulus Ed₁ ofdie bonding material (MPa) Flexural elastic 18220 16460 22980 2060025390 24750 25070 16560 24100 22310 modulus Ee₁ of encapsulatingmaterial (MPa) Coefficient αe₁ of 1.37 1.26 1.07 0.92 0.79 0.74 0.741.46 1.05 1.07 thermal expansion of encapsulating material (×10⁻⁵/° C.)Flexural strength σb of 144.26 130.25 144.78 127.22 153.87 133.07 175.62162.55 156.17 173.21 encapsulating material (MPa) Temperature 240difference ΔT₁ (° C.) σe (MPa) 6.27 7.55 15.09 16.74 24.08 24.76 25.084.14 16.32 14.65 σe/σb 0.04 0.06 0.10 0.13 0.16 0.19 0.14 0.03 0.10 0.08Number of samples 0 0 0 0 0 0 0 0 0 0 causing cracking in die bond padedge after heat cycle resistance test (/five samples) Warpage amount of28 semiconductor chip after curing die bonding material (μm)

TABLE 9 Samples 31-40 (chip warpage, heat cycle resistance) Experimentalexample 31 32 33 34 35 36 37 38 39 40 Coefficient αm of 1.7 thermalexpansion of lead frame (×10⁻⁵/° C.) Flexural elastic 9.5 modulus Ed₁ ofdie bonding material (MPa) Flexural elastic 18220 16460 22980 2060025390 24750 25070 16560 24100 22310 modulus Ee₁ of encapsulatingmaterial (MPa) Coefficient αe₁ of 1.37 1.26 1.07 0.92 0.79 0.74 0.741.46 1.05 1.07 thermal expansion of encapsulating material (×10⁻⁵/° C.)Flexural strength σb of 144.26 130.25 144.78 127.22 153.87 133.07 175.62162.55 156.17 173.21 encapsulating material (MPa) Temperature 240difference ΔT₁ (° C.) σe (MPa) 14.76 17.78 35.54 39.44 56.72 58.32 59.089.76 38.45 34.50 σe/σb 0.10 0.14 0.25 0.31 0.37 0.44 0.34 0.06 0.25 0.20Number of samples 0 0 5 5 5 5 5 0 5 0 causing cracking in die bond padedge after heat cycle resistance test (/five samples) Warpage amount of8 semiconductor chip after curing die bonding material (μm)

TABLE 10 Samples 1-10 (separation of inner lead portion) Experimentalexample 1 2 3 4 5 6 7 8 9 10 Coefficient αm of 1.7 thermal expansion oflead frame (×10⁻⁵/° C.) Flexural elastic 102.8 modulus Ed₂ of diebonding material (MPa) Flexural elastic 264 221 402 255 637 448 1351 576644 809 modulus Ee₂ of encapsulating material (MPa) Coefficient αe₂ of5.56 5.93 4.54 4.78 3.49 3.61 3.15 5.49 4.22 4.21 thermal expansion ofencapsulating material (×10⁻⁵/° C.) Shear strain energy 0.10 0.71 2.771.35 1.60 5.75 2.35 0.35 0.57 0.29 Ui (×10⁻⁶ N · m) Temperature 70difference ΔT₂ (° C.) σei (MPa) 0.71 0.65 0.80 0.55 0.80 0.60 1.37 1.531.14 1.42 Ui/σei (×10⁻⁶) 0.14 1.08 3.47 2.46 2.00 9.60 1.71 0.23 0.5 0.2Number of samples 5 5 0 0 0 0 5 5 5 5 causing separation of inner leadportion after solder mounting test (/five samples)

TABLE 11 Samples 1-10 (separation of die bond pad portion) Experimentalexample 1 2 3 4 5 6 7 8 9 10 Coefficient αm of 1.7 thermal expansion oflead frame (×10⁻⁵/° C.) Flexural elastic 102.8 modulus Ed₂ of diebonding material (MPa) Flexural elastic 264 221 402 255 637 448 1351 576644 809 modulus Ee₂ of encapsulating material (MPa) Coefficient αe₂ of5.56 5.93 4.54 4.78 3.49 3.61 3.15 5.49 4.22 4.21 thermal expansion ofencapsulating material (×10⁻⁵/° C.) Shear strain energy 0.50 2.70 22.1617.55 20.80 24.01 31.70 1.32 6.79 12.38 Ud (×10⁻⁶ N · m) Temperature 70difference ΔT₂ (° C.) σed (MPa) 1.44 1.32 1.61 1.11 1.61 1.21 2.76 3.072.29 2.86 Ud/σed (×10⁻⁶) 0.35 2.05 13.78 15.87 12.95 19.92 11.49 0.432.97 4.33 Number of samples 3 4 0 0 0 0 0 5 4 4 causing separation ofinner lead portion after solder mounting test (/five samples)

TABLE 12 Samples 11-20 (separation of die bond pad portion) Experimentalexample 1 2 3 4 5 6 7 8 9 10 Coefficient αm of 1.7 thermal expansion oflead frame (×10⁻⁵/° C.) Flexural elastic 74.7 modulus Ed₂ of die bondingmaterial (MPa) Flexural elastic 264 221 402 255 637 448 1351 576 644 809modulus Ee₂ of encapsulating material (MPa) Coefficient αe₂ of 5.56 5.934.54 4.78 3.49 3.61 3.15 5.49 4.22 4.21 thermal expansion ofencapsulating material (×10⁻⁵/° C.) Shear strain energy 0.50 2.70 22.1617.55 20.80 24.01 31.70 1.32 6.79 12.38 Ud (×10⁻⁶ N · m) Temperature 70difference ΔT₂ (° C.) σed (MPa) 1.34 1.23 1.50 1.03 1.50 1.12 2.57 2.862.13 2.66 Ud/σed (×10⁻⁶) 0.37 2.20 14.80 17.04 13.91 21.40 12.34 0.463.19 4.65 Number of samples 4 4 0 0 0 0 0 4 4 3 causing separation ofinner lead portion after solder mounting test (/five samples)

TABLE 13 Samples 21-30 (separation of die bond pad portion) Experimentalexample 1 2 3 4 5 6 7 8 9 10 Coefficient αm of 1.7 thermal expansion oflead frame (×10⁻⁵/° C.) Flexural elastic 18.8 modulus Ed₂ of die bondingmaterial (MPa) Flexural elastic 264 221 402 255 637 448 1351 576 644 809modulus Ee₂ of encapsulating material (MPa) Coefficient αe₂ of 5.56 5.934.54 4.78 3.49 3.61 3.15 5.49 4.22 4.21 thermal expansion ofencapsulating material (×10⁻⁵/° C.) Shear strain energy 0.50 2.70 22.1617.55 20.80 24.01 31.70 1.32 6.79 12.38 Ud (×10⁻⁶ N · m) Temperature 70difference ΔT₂ (° C.) σed (MPa) 0.91 0.83 1.02 0.70 1.02 0.76 1.75 1.951.45 1.81 Ud/σed (×10⁻⁶) 0.55 3.24 21.76 25.05 20.45 31.46 18.14 0.684.69 6.84 Number of samples 3 1 0 0 0 0 0 4 0 0 causing separation ofinner lead portion after solder mounting test (/five samples)

From the tables 6 to 9, the smaller the flexural elastic modulus (Ed₁)of the die bonding material at 25° C. is, the smaller the warpage of thesemiconductor chip after curing the die bonding material, and thesemiconductor chip remains good.

Similarly, from the tables 6 to 9, as for the number of samples causingthe crack in the edge of the die bond pad after the heat cycleresistance test, it is shown that when the value of the parameter ratio(σe/σd) of the equation (1) is 0.2 or less, the crack is not caused, andthe semiconductor device remains good. On the other hand, in each of theexperimental examples 33 to 37, and 39 in the table 9, the parameterratio (σe/σd) is more than 0.2, and the crack is caused in each of thefive samples of each experimental example. The result shows that thecontrol of the parameter ratio (σe/σd) to 0.2 or less allows to realizea semiconductor device which has no cracks and remains good even afterthe repetition of the severe heat cycles.

From the table 10, as for the separation of the inner lead portion afterthe solder mounting test, when the value of the parameter ratio (Ui/σei)of the equation (2) concerning the encapsulating material is more than2.0×10⁻⁶, the separation of the inner lead portion is not caused. On theother hand, as in experimental examples such as 1, 2, 7, 8, 9 and 10,when the parameter ratio (Ui/σei) is less than 2.0×10⁻⁶, the separationis caused between the encapsulating material and the inner lead portion.

As for the separation between the die bond pad portion and theencapsulating material, as shown in the tables 11, 12 and 13, when thevalue of the parameter ratio (Ud/σed) of the equation (3) is more than4.69×10⁻⁶, the separation is not caused in the die bond pad portionafter the solder mounting test and the semiconductor device remainsgood. On the other hand, as shown in the experimental examples 1, 2, 8,9, 10, 11, 12, 18, 19, 20, 21, 22 and 28, when the parameter ratio(Ud/σed) is less than 4.69×10⁻⁶, the separation is caused in the diebond pad portion. At the time when the semiconductor device is soldermounted on the printed circuit board or the like, the defect isgenerated.

From these experimental results, the combinations of die bondingmaterials and the encapsulating materials which are considered to beexcellent in resistance to the warpage of the semiconductor chip, heatcycle resistance, and mountability, the samples 23, 24, 25 and 26 areselected from the samples shown in the table 5, and the warpage of thesemiconductor device, heat cycle resistance, and mountability warecontinuously measured for these samples. The results thereof are shownin table 14.

TABLE 14 Example 1 2 3 4 Experimental Example Experimental ExperimentalExperimental Experimental example 23 example 24 example 25 example 26Coefficient αm of thermal expansion 1.7 of lead frame (×10⁻⁵/° C.)Flexural elastic Ed₁ (MPa) 201 modulus of die Ed₂ (MPa) 18.8 bondingmaterial Flexural elastic Ee₁ (MPa) 22980 20600 25390 24750 modulus ofEe₂ (MPa) 402 255 637 448 encapsulating material Coefficient of αe₁(×10⁻⁵/° C.) 1.07 0.92 0.79 0.74 thermal αe₂ (×10⁻⁵/° C.) 4.54 4.78 3.493.61 expansion of encapsulating material Flexural strength σb (MPa)144.78 127.22 153.87 133.07 of encapsulating material Shear strain Ui(×10⁻⁶ N · m) 2.77 1.35 1.60 5.75 energy Ud (×10⁻⁶ N · m) 22.16 17.5520.80 24.01 Temperature difference ΔT₁ (° C.) 240 Temperature differenceΔT₂ (° C.) 70 σe (MPa) 15.09 16.74 24.08 24.76 σei (MPa) 0.80 0.55 0.800.60 σed (MPa) 1.02 0.70 1.02 0.76 σe/σb 0.10 0.13 0.16 0.19 Ui/σei(×10⁻⁶) 3.47 2.46 2.00 9.60 Ud/σed (×10⁻⁶) 21.76 25.05 20.45 31.46Warpage amount of semiconductor 28 chip after curing die bondingmaterial (μm) Number of samples causing cracking 0 0 0 0 in die bond padedge after heat cycle resistance test (/five samples) Number of samplescausing 0 0 0 0 separation of inner lead portion after solder mountingtest (/five samples) Number of samples causing 0 0 0 0 separation of diebond pad portion after solder mounting test (/five samples)

Each of these four examples satisfies the following conditions:

the parameter ratio (σe/σb) concerning the crack in the edge of the diebond pad caused in the heat cycle is 0.2 or less;

the parameter ratio (Ui/σei) concerning the separation of the inner leadportion after the solder mounting test is 2.0×10⁻⁶ or more; and

the parameter ratio (Ud/σed) concerning the separation of the die bondpad portion after the solder mounting test is 4.69×10⁻⁶ or more. Withthe combination of these die bonding materials and encapsulatingmaterials, the warpage of the chip is reduced and the crack in the edgeof the die bond pad, the separation of the die bond pad portion, and theseparation of the inner lead portion are eliminated, thus obtaining aresin-sealed semiconductor device excellent in heat cycle resistance andmountability.

From these results, the optimal physical properties of the die bondingmaterial and the encapsulating materials can be specified as follows.

Specifically, the flexural elastic modulus of the die bonding materialat 25° C. after curing is in the range of 1 to 300 MPa, and theproperties of the die bonding material and the encapsulating materialsafter curing are:

σe≦0.2×σb  equation (1)

Ui≧0 2.0××10⁻⁶ ×σei  equation (2)

Ud≧4.69×10⁻⁶ ×σed  equation (3)

Here,

σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁;

σei=Ee ₂×(αe ₂ −αm)×ΔT ₂;

σed=log(kd ₂)×Ee ₂×(αe ₂ −αm)×ΔT ₂;

σb: flexural strength of the encapsulating material at 25° C. (MPa);

Ui: shear strain energy (N·m) of the encapsulating material against theinner lead portion at the peak temperature during the solder mounting;

Ud: shear strain energy (N·m) of the encapsulating material against thedie bond pad portion at the peak temperature during the solder mounting;

kd₁: a ratio of the flexural elastic modulus Ed₁ (MPa) of the diebonding material at 25° C. to an elastic modulus of 1 MPa (Ed₁>1 MPa);

kd₂: a ratio of the flexural elastic modulus Ed₂ (MPa) of the diebonding material at the peak temperature during the solder mounting toan elastic modulus of 1 MPa (Ed₂>1 MPa);

Ee₁: a flexural elastic modulus (MPa) of the encapsulating material at25° C.;

Ee₂: a flexural elastic modulus (MPa) of the encapsulating material atthe peak temperature during the solder mounting;

αe₁: an average coefficient of thermal expansion (1/° C.) of theencapsulating material from the formation temperature of thesemiconductor device (175° C.) to 25° C.;

αe₂: an average coefficient of thermal expansion (1/° C.) of theencapsulating material from the formation temperature of thesemiconductor device to the peak temperature during the solder mounting;

αm: a coefficient of thermal expansion (1/° C.) of the lead frame;

ΔT₁: a temperature difference (° C.) between the formation temperatureof the semiconductor device and temperature on the low temperature sideof the heat cycle; and

ΔT₂: a temperature difference (° C.) between the formation temperatureof the semiconductor device and the peak temperature during the soldermounting.

In other words, with the combination of the die bonding materialcontaining the inorganic filler of 20-85 wt %, the resin component, andthe stress-reducing agent constituting 40-70 wt % of the total amount ofthe resin component and the encapsulating material containing epoxyresin expressed by the general formula (I) and the inorganic filler, thecontent of the inorganic filler being set to 82-90 wt % of the totalamount, a semiconductor device excellent in the suppression of thewarpage of the semiconductor chip, heat cycle resistance, and soldermountability can be realized.

However, even in the case of satisfying at least two equations of theabove described equations (1), (2), and (3), generation of the crack andthe separation of the encapsulating material can be prevented. Moreover,the warpage of the chip at 25° C. after mounting the chip onto the diebond pad can be effectively prevented by setting the flexural elasticmodulus of the die bonding material at 25° C. in the range of 1-300 MPa.

As described above, according to the resin-sealed semiconductor deviceof the present invention, the warpage of the semiconductor chip can besuppressed, and the crack in the edge of the die bond pad is not causedunder the severe conditions of the heat cycle. Furthermore, when soldermounting onto the printed circuit board or the like, the separation isnot caused in the inner lead portion and the die bond pad portion, thusresulting in excellent operational reliability. Particularly, theresin-sealed semiconductor device of the present invention is optimallyapplied to a surface-mount type package such as QFP because of the smallwarpage of the chip and the excellent heat cycle resistance andmountability.

In the case of using the die bonding material and the encapsulatingmaterial of the present invention, the reliability result can bepredicted from the properties of the encapsulating material and the diebonding material without carrying out the series of steps of preparingthe die bonding material, the encapsulating material, and the leadframe, assembling the resin-sealed semiconductor device, and evaluatingthe warpage of the semiconductor chip, the mountability, and the heatcycle resistance from the beginning. Consequently, the development cycleof the die bonding material and the encapsulating material for thesemiconductor device can be considerably shortened.

What is claimed is:
 1. A resin-sealed semiconductor device, comprising:at least one semiconductor chip mounted on a die bond pad of a leadframe with a die bonding material interposed therebetween and sealed bya encapsulating material, wherein the die bonding material at 25° C.after curing has a flexural elastic modulus Ed₁ of 1 MPa or more but notexceeding 300 MPa, and the properties of the encapsulating material andthe die bonding material after curing satisfy an equation (1),σe≦0.2×σb  equation (1), where σb: a flexural strength (MPa) of theencapsulating material at 25° C.; σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁;kd₁: a ratio of the flexural elastic modulus Ed₁ (MPa) of the diebonding material at 25° C. to an elastic modulus of 1 MPa (Ed₁>1 MPa);Ee₁: a flexural elastic modulus (MPa) of the encapsulating material at25° C.; αe₁: an average coefficient of thermal expansion (1/° C.) of theencapsulating material from a formation temperature of the semiconductordevice to 25° C.; αm: a coefficient of thermal expansion (1/° C.) of thelead frame; and ΔT₁: a temperature difference (° C.) between theformation temperature of the semiconductor device and a temperature onthe low temperature side of the heat cycle.
 2. The resin-sealedsemiconductor device according to claim 1, wherein the die bondingmaterial contains an inorganic filler of 20-85 wt %, a resin component,and a stress-reducing agent constituting 40-70 wt % of a total amount ofthe resin component.
 3. The resin-sealed semiconductor device accordingto claim 1, wherein the properties of the encapsulating material satisfythat: (a) the flexural elastic modulus at 25° C. is 26 GPa or less, (b)the average coefficient of thermal expansion from the formationtemperature of the semiconductor device to 25° C. is 0.7×10⁻⁵/° C. ormore, and (c) the flexural strength at 25° C. is 120 MPa or more.
 4. Theresin-sealed semiconductor device according to claim 1, wherein the leadframe is made of a copper alloy, and part of a surface thereof includesa plating layer made of one selected from silver, gold, or palladium. 5.A die bonding material used in a resin-sealed semiconductor devicehaving a semiconductor chip sealed by a encapsulating material formounting the semiconductor chip on a die bond pad of a lead frame,wherein the die bonding material at 25° C. after curing has a flexuralelastic modulus Ed₁ of 1 MPa or more but not exceeding 300 MPa, and aproperty relation between the encapsulating material and the die bondingmaterial after curing satisfies an equation (1), σe≦0.2×σb  equation(1), where σb: a flexural strength (MPa) of the encapsulating materialat 25° C.; σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁; kd₁: a ratio of theflexural elastic modulus Ed₁ (MPa) of the die bonding material at 25° C.to an elastic modulus of 1 MPa (Ed₁>1 MPa); Ee₁: a flexural elasticmodulus (MPa) of the encapsulating material at 25° C.; αe₁: an averagecoefficient of thermal expansion (1/° C.) of the encapsulating materialfrom a formation temperature of the semiconductor device to 25° C.; αm:a coefficient of thermal expansion (1/° C.) of the lead frame; and ΔT₁:a temperature difference (° C.) between the formation temperature of thesemiconductor device and a temperature on the low temperature side ofthe heat cycle.
 6. The die bonding material according to claim 5,wherein the die bonding material contains an inorganic filler of 20-85wt %, a resin component, and a stress-reducing agent constituting 40-70wt % of a total amount of the resin component, and the flexural elasticmodulus at 25° C. is 1 MPa or more but not exceeding 300 MPa.
 7. Anencapsulating material for encapsulating a semiconductor chip mounted ona die bond pad of a lead frame by a die bonding material to manufacturea semiconductor device, wherein a property relation between theencapsulating material and the die bonding material after curingsatisfies an equation (1), σe≦0.2×σb  equation (1), where σb: a flexuralstrength (MPa) of the encapsulating material at 25° C.; σe=(1/log(kd₁))×Ee ₁×(αm−αe ₁)×ΔT ₁; kd₁: a ratio of the flexural elastic modulusEd₁ (MPa) of the die bonding material at 25° C. to an elastic modulus of1 MPa (Ed₁>1 MPa); Ee₁: a flexural elastic modulus (MPa) of theencapsulating material at 25° C.; αe₁: an average coefficient of thermalexpansion (1/° C.) of the encapsulating material from a formationtemperature of the semiconductor device to 25° C.; αm: a coefficient ofthermal expansion (1/° C.) of the lead frame; and ΔT₁: a temperaturedifference (° C.) between the formation temperature of the semiconductordevice and a temperature on the low temperature side of the heat cycle.8. The encapsulating material according to claim 7, wherein theproperties after curing satisfy the following: (a) the flexural elasticmodulus at 25° C. is 26 GPa or less, (b) the average coefficient ofthermal expansion from the formation temperature of the semiconductordevice to 25° C. is 0.7×10⁻⁵/° C. or more, and (c) the flexural strengthat 25° C. is 120 MPa or more.
 9. A resin-sealed semiconductor device,comprising: a lead frame including a die bond pad and an inner lead, asemiconductor chip placed on the die bond pad with a die bondingmaterial interposed therebetween, and a encapsulating materialencapsulating the semiconductor chip and the lead frame, wherein when ashear strain energy of the encapsulating material against the inner leadat a peak temperature during solder mounting is Ui; and a shear strainenergy of the encapsulating material against the die bond pad at thepeak temperature during the solder mounting is Ud, properties of the diebonding material and the encapsulating material after curing satisfy atleast one of the following equations (2) and (3), Ui≧2.0×10⁻⁶×σei  equation (2), Ud≧4.69×10⁻⁶ ×σed  equation (3), where σei=Ee ₂×(αe₂ ×αm)×ΔT ₂; σed=log(kd ₂)×Ee ₂×(αe ₂ −αm)×ΔT ₂; kd₂: a ratio of theflexural elastic modulus Ed₂ (MPa) of the die bonding material at a peaktemperature during solder mounting to an elastic modulus of 1 MPa (Ed₂>1MPa); Ee₂: a flexural elastic modulus (MPa) of the encapsulatingmaterial at the peak temperature during the solder mounting; αe₂: anaverage coefficient of thermal expansion (1/° C.) of the encapsulatingmaterial from a formation temperature of the semiconductor device to thepeak temperature during the solder mounting; αm: a coefficient ofthermal expansion (1/° C.) of the lead frame; and ΔT₂: a temperaturedifference (° C.) between the formation temperature of the semiconductordevice and the peak temperature during the solder mounting.
 10. Theresin-sealed semiconductor device according to claim 9, wherein the diebonding material contains an inorganic filler of 20-85 wt %, a resincomponent, and a stress-reducing agent constituting 40-70 wt % of atotal amount of the resin component, and properties of the die bondingmaterial after curing satisfy the following: (1) the flexural elasticmodulus at the peak temperature during the solder mounting is 70 MPa orless.
 11. The resin-sealed semiconductor device according to claim 9,wherein the encapsulating material contains epoxy resin expressed by thefollowing general formula (I), t-Bu of the general formula (I)representing a tertiary butyl group, and an inorganic filler, thecontent of the inorganic filler is 82-90 wt % of the total amount, andproperties of the encapsulating material after curing satisfy thefollowings: (1) the flexural elastic modulus at the peak temperatureduring the solder mounting is 650 MPa or less, (2) the averagecoefficient of thermal expansion from the formation temperature of thesemiconductor device to the peak temperature during the solder mountingis 5.0×10⁻⁵/° C. or less, (3) the shear strain energy of theencapsulating material against the inner lead at a peak temperatureduring solder mounting is 1.35×10⁻⁶ N·m or more, and (4) the shearstrain energy of the encapsulating material against the die bond pad ata peak temperature during solder mounting is 6.8×10⁻⁶ N·m or more.


12. The resin-sealed semiconductor device according to claim 9, whereinthe lead frame is made of a copper alloy, and part of a surface thereofincludes a plating layer made of one selected from silver, gold, orpalladium.
 13. A die bonding material for mounting a semiconductor chipon a die bond pad of a lead frame used in a resin-sealed semiconductordevice including the semiconductor chip sealed by a encapsulatingmaterial, the lead frame including the die bond pad and an inner lead,wherein when a flexural elastic modulus of the die bonding material at apeak temperature during solder mounting after curing is Ed₂; a ratio ofthe flexural elastic modulus Ed₂ of the die bonding material at the peaktemperature during the solder mounting to an elastic modulus of 1 MPa(Ed₂>1 MPa) is kd₂; a shear strain energy of the encapsulating materialagainst the inner lead at the peak temperature during the soldermounting is Ui; and a shear strain energy of the encapsulating materialagainst the die bond pad at the peak temperature during the soldermounting is Ud, a property relation between the die bonding material andthe encapsulating material after curing satisfy at least one of thefollowing equations (2) and (3), Ui≧2.0×10⁻⁶ ×σei  equation (2),Ud≧4.69×10⁻⁶ ×σed  equation (3), where σei=Ee ₂×(αe ₂ −αm)×ΔT ₂;σed=log(kd ₂)×Ee ₂×(αe ₂ −αm)×ΔT ₂; Ee₂: a flexural elastic modulus(MPa) of the encapsulating material at the peak temperature during thesolder mounting; αe₂: an average coefficient of thermal expansion (1/°C.) of the encapsulating material from a formation temperature of thesemiconductor device to the peak temperature during the solder mounting;αm: a coefficient of thermal expansion (1/° C.) of the lead frame; andΔT₂: a temperature difference (° C.) between the formation temperatureof the semiconductor device and the peak temperature during the soldermounting.
 14. The die bonding material according to claim 13, whereinthe die bonding material contains an inorganic filler of 20-85 wt %, aresin component, and a stress-reducing agent constituting 40-70 wt % ofthe total amount of the resin component, and the flexural elasticmodulus Ed₂ at the peak temperature during the solder mounting is 70 MPaor less.
 15. A encapsulating material for encapsulating a semiconductorchip mounted on a die bond pad of a lead frame by a die bonding materialto manufacture a semiconductor device, the lead frame including the diebond pad and an inner lead, wherein when a shear strain energy of theencapsulating material against the inner lead at a peak temperatureduring solder mounting is Ui; and a shear strain energy of theencapsulating material against the die bond pad at the peak temperatureduring the solder mounting is Ud, a property relation between theencapsulating material and the die bonding material after curing satisfyat least one of the following equations (2) and (3), Ui≧2.0×10⁻⁶×σei  equation (2), Ud≧4.69×10⁻⁶ ×σed  equation (3), where σei=Ee ₂×(αe₂ −αm)×ΔT ₂; σed=log(kd ₂)×Ee ₂×(αe ₂ −αm)×ΔT ₂; kd₂: a ratio of theflexural elastic modulus Ed₂ (MPa) of the die bonding material at thepeak temperature during the solder mounting to an elastic modulus of 1MPa (Ed₂>1 MPa); Ee₂: a flexural elastic modulus (MPa) of theencapsulating material at the peak temperature during the soldermounting; αe₂: an average coefficient of thermal expansion (1/° C.) ofthe encapsulating material from a formation temperature of thesemiconductor device to the peak temperature during the solder mounting;αm: a coefficient of thermal expansion (1/° C.) of the lead frame; andΔT₂: a temperature difference (° C.) between the formation temperatureof the semiconductor device and the peak temperature during the soldermounting.
 16. The encapsulating material according to claim 15, whereinthe encapsulating material contains epoxy resin expressed by thefollowing general formula (I), t-Bu of the general formula (I)representing a tertiary butyl group, and an inorganic filler, thecontent of the inorganic filler is 82-90 wt % of the total amount, andproperties after curing satisfy the following: (1) the flexural elasticmodulus at the peak temperature during the solder mounting is 650 MPa orless, (2) the average coefficient of thermal expansion from theformation temperature of the semiconductor device to the peaktemperature during the solder mounting is 5.0×10⁻⁵/° C. or less, (3) theshear strain energy of the encapsulating material against the inner leadat a peak temperature during solder mounting is 1.35×10⁻⁶ N·m or more,and (4) the shear strain energy of the encapsulating material againstthe die bond pad at a peak temperature during solder mounting is6.8×10⁻⁶ N·m or more.


17. A resin-sealed semiconductor device, comprising: a lead frameincluding a die bond pad and an inner lead, a semiconductor chip placedon the die bond pad with a die bonding material interposed therebetween;and a encapsulating material encapsulating the semiconductor chip andthe lead frame, wherein when a flexural strength of the encapsulatingmaterial at 25° C. is σb (MPa); a shear strain energy of theencapsulating material against the inner lead at a peak temperatureduring solder mounting is Ui (N·m); and a shear strain energy of theencapsulating material against the die bond pad at the peak temperatureduring the solder mounting is Ud(N·m), properties of the die bondingmaterial and the encapsulating material after curing satisfy at leastone of the following equations (1), (2) and (3), σe≦0.2×σb  equation(1), Ui≧2.0×10⁻⁶ ×σei  equation (2), Ud≧4.69×10⁻⁶ ×σed  equation (3),where σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁  equation (4); σei=Ee ₂×(αe ₂−αm)×ΔT ₂  equation (5); σed=log(kd ₂)×Ee ₂×(αe ₂ ×αm)×ΔT ₂  equation(6); kd₁: a ratio of the flexural elastic modulus Ed₁ (MPa) of the diebonding material at 25° C. to an elastic modulus of 1 MPa (Ed₁>1 MPa);kd₂: a ratio of the flexural elastic modulus Ed₂ (MPa) of the diebonding material at the peak temperature during the solder mounting toan elastic modulus of 1 MPa (Ed₂>1 MPa); Ee₁: a flexural elastic modulus(MPa) of the encapsulating material at 25° C.; Ee₂: a flexural elasticmodulus (MPa) of the encapsulating material at the peak temperatureduring the solder mounting; αe₁: an average coefficient of thermalexpansion (1/° C.) of the encapsulating material from a formationtemperature of the semiconductor device to a room temperature (25° C.);αe₂: an average coefficient of thermal expansion (1/° C.) of theencapsulating material from the formation temperature of thesemiconductor device to the peak temperature during the solder mounting;αm: a coefficient of thermal expansion (1/° C.) of the lead frame; ΔT₁:a temperature difference (° C.) between the formation temperature of thesemiconductor device and a temperature on the low temperature side ofthe heat cycle; and ΔT₂: a temperature difference (° C.) between theformation temperature of the semiconductor device and the peaktemperature during the solder mounting.
 18. The resin-sealedsemiconductor device according to claim 17, wherein the die bondingmaterial contains an inorganic filler of 20-85 wt %, a resin component,and a stress reducing agent constituting 40-70 wt % of the total amountof the resin component, and properties of the die bonding material aftercuring satisfy the following: (1) the flexural elastic modulus at 25° C.is 1 MPa or more but not exceeding 300 MPa, and (2) the flexural elasticmodulus at the peak temperature during the solder mounting is 70 MPa orless.
 19. The resin-sealed semiconductor device according to claim 17,wherein the encapsulating material contains epoxy resin expressed by thefollowing general formula (I), t-Bu of the general formula (I)representing a tertiary butyl group, and an inorganic filler, thecontent of the inorganic filler is 82-90 wt % of the total amount, andproperties of the encapsulating material after curing satisfy thefollowings: (1) the flexural elastic modulus at 25° C. is 26 GPa orless, (2) the average coefficient of thermal expansion from theformation temperature of the semiconductor device to 25° C. is0.7×10⁻⁵/° C. or more, (3) the flexural strength at 25° C. is 120 MPa ormore, (4) the flexural elastic modulus at the peak temperature duringthe solder mounting is 650 MPa or less, (5) the average coefficient ofthermal expansion from the formation temperature of the semiconductordevice to the peak temperature during the solder mounting is 5.0×10⁻⁵/°C. or less, (6) the shear strain energy of the encapsulating materialagainst the inner lead at the peak temperature during the soldermounting is 1.35×10⁻⁶ N·m or more, and (7) the shear strain energy ofthe encapsulating material against the die bond pad at the peaktemperature during the solder mounting is 6.8×10⁻⁶ N·m or more.


20. The resin-sealed semiconductor device according to claim 17, whereinthe lead frame is made of a copper alloy, and part of a surface thereofincludes a plating layer made of one selected from silver, gold, orpalladium.
 21. A die bonding material for mounting a semiconductor chipon a die bond pad of a lead frame used in a resin-sealed semiconductordevice including the semiconductor chip sealed by an encapsulatingmaterial, the lead frame including the die bond pad and an inner lead,wherein when a flexural elastic modulus of the die bonding material at25° C. is Ed₁ (MPa); a flexural elastic modulus of the die bondingmaterial at a peak temperature during solder mounting is Ed₂ (MPa); aratio of the flexural elastic modulus Ed₁ (MPa) of the die bondingmaterial at 25° C. to an elastic modulus of 1 MPa (Ed₁>1 MPa) is kd₁; aratio of the flexural elastic modulus Ed₂ of the die bonding material atthe peak temperature during the solder mounting to an elastic modulus of1 MPa (Ed₂>1 MPa) is kd₂; a flexural strength of the encapsulatingmaterial at 25° C. is cub (MPa); a shear strain energy of theencapsulating material against the inner lead at the peak temperatureduring the solder mounting is Ui (N·m); and a shear strain energy of theencapsulating material against the die bond pad at the peak temperatureduring the solder mounting is Ud (N·m), properties of the die bondingmaterial and the encapsulating material after curing satisfy at leastone of the following equations (1), (2) and (3), σe≦0.2×σb  equation(1), Ui≧2.0×10⁻⁶ ×σei  equation (2), Ud≧4.69×10⁻⁶ ×σed  equation (3),where σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁  equation (4); σei=Ee ₂×(αe ₂−αm)×ΔT ₂  equation (5); σed=log(kd ₂)×Ee ₂×(αe ₂ −αm)×ΔT ₂  equation(6); Ee₁: a flexural elastic modulus (MPa) of the encapsulating materialat 25° C.; Ee₂: a flexural elastic modulus (MPa) of the encapsulatingmaterial at the peak temperature during the solder mounting; αe₁: anaverage coefficient of thermal expansion (1/° C.) of the encapsulatingmaterial from a formation temperature of the semiconductor device to aroom temperature (25° C.); αe₂: an average coefficient of thermalexpansion (1/° C.) of the encapsulating material from the formationtemperature of the semiconductor device to the peak temperature duringthe solder mounting; αm: a coefficient of thermal expansion (1/° C.) ofthe lead frame; ΔT₁: a temperature difference (° C.) between theformation temperature of the semiconductor device and a temperature onthe low temperature side of the heat cycle; and ΔT₂: a temperaturedifference (° C.) between the formation temperature of the semiconductordevice and the peak temperature during the solder mounting.
 22. The diebonding material according to claim 21, wherein the die bonding materialcontains an inorganic filler of 20-85 wt %, a resin component, and astress reducing agent constituting 40-70 wt % of the total amount of theresin component, and properties after curing satisfy the following: (1)the flexural elastic modulus at 25° C. is 1 MPa or more but notexceeding 300 MPa, and (2) the flexural elastic modulus at the peaktemperature during the solder mounting is 70 MPa or less.
 23. Aencapsulating material for encapsulating a semiconductor chip with anencapsulating material to manufacture a semiconductor device, thesemiconductor chip being mounted on a die bond pad of a lead frame by adie bonding material, the lead frame including the die bond pad and aninner lead, wherein when a flexural strength of the encapsulatingmaterial at 25° C. is σb (MPa); a flexural elastic modulus of theencapsulating material at 25° C. is Ee₁ (MPa); a flexural elasticmodulus of the encapsulating material at a peak temperature duringsolder mounting is Ee₂ (MPa); a shear strain energy of the encapsulatingmaterial against the inner lead at the peak temperature during thesolder mounting is Ui (N·m); and a shear strain energy of theencapsulating material against the die bond pad at the peak temperatureduring the solder mounting is Ud (N·m), a property relation between thedie bonding material and the encapsulating material after curing satisfyat least one of the following equations (1), (2) and (3),σe≦0.2σb  equation (1), Ui≧2.0×10⁻⁶ ×σei  equation (2), Ud≧4.69×10⁻⁶×σed  equation (3), where σe=(1/log(kd ₁))×Ee ₁×(αm−αe ₁)×ΔT ₁  equation(4); σei=Ee ₂×(αe ₂ −αm)×ΔT ₂  equation (5); σed=log(kd ₂)×Ee ₂×(αe ₂−αm)×ΔT₂  equation (6); kd₁: a ratio of the flexural elastic modulus Ed₁(MPa) of the die bonding material at 25° C. to an elastic modulus of 1MPa (Ed₁>1 MPa); kd₂: a ratio of the flexural elastic modulus Ed₂ (MPa)of the die bonding material at the peak temperature during the soldermounting to an elastic modulus of 1 MPa (Ed₂>1 MPa); αe₁: an averagecoefficient of thermal expansion (1/° C.) of the encapsulating materialfrom the formation temperature of the semiconductor device to a roomtemperature (25° C.); αe₂: an average coefficient of thermal expansion(1/° C.) of the encapsulating material from the formation temperature ofthe semiconductor device to the peak temperature during the soldermounting; αm: a coefficient of thermal expansion (1/° C.) of the leadframe; ΔT₁: a temperature difference (° C.) between the formationtemperature of the semiconductor device and a temperature on the lowtemperature side of the heat cycle; and ΔT₂: a temperature difference (°C.) between the formation temperature of the semiconductor device andthe peak temperature during the solder mounting.
 24. The encapsulatingmaterial according to claim 23, wherein the encapsulating materialcontains epoxy resin expressed by the following general formula (I),t-Bu of the general formula (I) representing a tertiary butyl group, andan inorganic filler, the content of the inorganic filler is 82-90 wt %of the total amount, and properties after curing satisfy the followings:(1) the flexural elastic modulus at 25° C. is 26 GPa or less, (2) theaverage coefficient of thermal expansion from a formation temperature ofthe semiconductor device to 25° C. is 0.7×10⁻⁵/° C. or more, (3) theflexural strength at 25° C. is 120 MPa or more, (4) the flexural elasticmodulus at the peak temperature during the solder mounting is 650 MPa orless, (5) the average coefficient of thermal expansion from theformation temperature of the semiconductor device to the peaktemperature during the solder mounting is 5.0×10⁻⁵/° C. or less, (6) theshear strain energy of the encapsulating material against the inner leadat a peak temperature during solder mounting is 1.35×10⁻⁶ N·m or more,and (7) the shear strain energy of the encapsulating material againstthe die bond pad at a peak temperature during solder mounting is6.8×10⁻⁶ N·m or more.